1. Field
Exemplary embodiments of the present invention relate to memory and a memory system including the same.
2. Description of the Related Art
A memory cell of a memory includes a transistor serving as a switch and a capacitor that may store charges, i.e., data. Whether data is high (logic “1”) or low (logic “0”) is determined by whether or not charges are present in the capacitor of the memory cell, that is, whether or not a potential between both terminals of the capacitor is high or low.
The data stored in the capacitor is in the form of an accumulated electrical charge. Ideally there is no power consumption of the stored electrical charge. Since leakage current occurs due to a PN junction of a metal oxide semiconductor (MOS) transistor, the amount of charges initially stored in the capacitor is lost, thus the stored data may be lost. To prevent such a loss, the data within the memory cell needs to be read before the data is lost, and a normal amount of charges needs to be recharged based on the read information. The memory of the data remains intact only when such an operation is periodically repeated. Such a recharging process of cell charges is called a refresh operation.
FIG. 1 is a diagram illustrating a section of a cell array included in a memory for describing a word line disturbance.
Referring to FIG. 1, “WLK−1”, “WLK”, and “WLK+1” are three word lines that are disposed in parallel. The word line WLK indicated by “HIGH_ACT” is a frequently activated word line having a large number of activation times or a high activation frequency, and the word lines WLK−1 and WLK+1 are adjacent word lines adjacent to WLK, “CELL_K−1” “CELL_K”, and “CELL_K+1” are memory cells coupled with the respective word lines WLK−1, WLK, and WLK+1. The memory cells CELL_K−1, CELL_K and CELL_K+1 include respective cell transistors TR_K−1, TR_K and TR_K+1 and respective cell capacitors CAP_K−1, CAP_K, and CAP_K+1. For reference, ‘BL’ and ‘BL+1.’ indicate a bit line.
When the frequently activated word line WLK is activated and precharged, voltages of the adjacent word lines WLK−1 and WLK+1 increase or decrease due to a coupling phenomenon occurring between the frequently activated word line WLK and the adjacent word lines WLK−1 and WLK+1. Accordingly, the amount of charges stored in the cell capacitors CAP_K−1, CAP_K, and CAP_K+1 is affected. If the frequently activated word line WLK toggles between an active state and a precharge state, data stored in the memory cells CELL_K−1 and CELL_K+1 may be lost due to a change in the amount of charges stored in the cell capacitors CAP_K−1 and CAP_K+1.
Furthermore, data stored in memory cells coupled with adjacent word lines may be damaged because electromagnetic waves generated when a word line toggles between an active state and a precharge state induce and drain electrons stored in the cell capacitors of the memory cells.